ESD

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Part No.

Peak Power
Dissipation
8x20μsec(W)

Reverse
Stand-Off
Voltage
VRWM(V)

Max
Clamping
Voltage
VC (V)
@ IPP

Reverse
Leakage
IR (μA)
@ VRWM

Peak
Pulse
Current
8x20μsec IPP (A)

Off-State
Capacitatance
1MHz Zero
dc Bias

Marking Code

Case

Circuit Figure

 

SESD3V3WB

210

3.3

13

1

16

120

A

WBFBP-02C

Fig.1

SESD5V0WB

170

5

13

1

13

95

B

WBFBP-02C

Fig.1

SESD7V0WB

150

7

15.1

1

10

70

X7

WBFBP-02C

Fig.1

SESD12VWB

225

12

25

1

9

48

C

WBFBP-02C

Fig.1

SESDL5V0WB

120

5

12

1

8

30

EB

WBFBP-02C

Fig.12

SESDLL5V0WB

62.5

5

12

0.1

5

15

H

WBFBP-02C

Fig.2

SESDU5V0WB

10

5

10

1

1

0.5

AE

WBFBP-02C

Fig.1

SESD9D3V3

60

3.3

10.4

2.5

9.8

80

E

SOD-923

Fig.1

SESD9D5V

60

5

15

1

7.8

25

G

SOD-923

Fig.1

SESD9D12V

60

12

25

1

5.2

15

H

SOD-923

Fig.1

SESD9D5C

150

5

30

1

6.6

11

9C or C

SOD-923

Fig.2

SESD5L5.0T1

50

5

9.8

1

5

0.9

5L

SOD-523

Fig.1

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